The present invention relates to a semiconductor power device for use in high-temperature applications requiring a high breakdown voltage and a large current, which is suited to high-power-consumption equipment such as a lighting device or an air conditioner.
Silicon carbide (SiC) is a semiconductor having a band gap larger than that of silicon (Si) and therefore high dielectric resistance. Since silicon carbide retains stability at high temperatures, a semiconductor device formed by using a SiC substrate is expected to be applied to a next-generation power device or high-temperature operating device. In general, a power device is a generic name for a device which converts or controls high power and is termed a power diode, a power transistor, or the like. Exemplary applications of the power device include a transistor and a diode disposed in the inverter control unit of such equipment as a vacuum cleaner, a laundry washer, a refrigerator, a fluorescent lamp, or an air conditioner. The applications of the power device is expected to be widened in the future.
For these applications, a plurality of semiconductor chips are typically connected with wires in accordance with a use and an object and placed in a single package to provide a modular structure. For example, a desired circuit is constructed with semiconductor chips and wires by forming the wires on a substrate such that a circuit suitable for the use is constructed and mounting the individual semiconductor chips on the substrate. As a conventional example of a semiconductor power device circuit, a description will be given to an inverter circuit for a fluorescent lamp using a Schottky diode and a MOS field effect transistor.
FIG. 18 is a cross-sectional view showing a structure of a conventional fluorescent bulb lamp device 250 disclosed in PCT Application No. JP00/02054. As shown in the drawing, the fluorescent lamp device 250 comprises: a fluorescent lamp 201 composed of three luminescent tubes each having a generally U-shaped configuration which are coupled to each other with bridges; a lighting circuit 202 including such an element as a semiconductor chip for lighting the fluorescent lamp 201; a cover 203 for containing the lighting circuit 202; a mouth ring 204 attached to a tip of the cover 203; and a globe 205 enveloping the fluorescent lamp 201.
FIG. 19 is an electric circuit diagram showing a structure of the lighting circuit 202 in the fluorescent lamp device 250. As shown in the drawing, the lighting circuit 202 is composed of a line filter circuit 212, a rectifying circuit 213, a power-supply smoothing capacitor 214, an inverter circuit 215, a choke coil 207, and a resonating capacitor 216 which are disposed in the lighting circuit 202. The inverter circuit 215 is composed of an inverter driving IC 217, FETs 208 and 209 which are switching elements driven by the inverter driving IC 217, and a capacitor 218 for inverter. The fluorescent lamp 201 is disposed in parallel with the resonating capacitor 216 such that fluorescent light is emitted therefrom by allowing a discharge current to flow between electrodes 221 and 222 at both ends in the fluorescent lamp 201.
In the conventional fluorescent lamp device 250, the individual circuits are formed as discrete external components and then the line filter circuit 212, the power-supply smoothing capacitor 214, the choke coil 207, the resonating capacitor 216, the capacitor 218 for inverter, and the like are disposed on a top surface 206a of a circuit board 206, while the rectifying circuit 213, the inverter driving IC 217, the FETs 208 and 209, and the like are disposed on a back surface 206b of the circuit board 206. In short, components having relatively low heat resistance such as the rectifying circuit 213, the inverter driving IC 217, and the FETs 208 and 209 in the inverter circuit 215 are disposed on the surface different from the surface on which the choke coil 207 as a heat generating component and the like are disposed in spaced apart relation therefrom.
Since the current flowing in the electrodes 221 and 222 of the fluorescent lamp 202 is large to impart sufficient brightness to the lamp, a pMOSFET and an nMOSFET as power transistors are used as the FETs 208 and 209 disposed in the inverter circuit 215. On the other hand, a power diode is used as the diode disposed in the rectifying circuit 213. The basic function of the power device including the power transistor and the power diode is equivalent to that of an AC-DC-AC converter for converting 50/60 Hz to, e.g., 50 kHz. As such a power transistor or a power diode, a power device provided on a SiC substrate as described above is adopted oftentimes.
However, the foregoing conventional fluorescent lamp device has the following problems.
In the conventional fluorescent lamp device 250, solder or the like is used normally to mount the transistor, diode, and the like on the substrate. However, the transistor, the diode, and the like cannot be positioned adjacent, e.g., a fluorescent lamp which generates a large amount of heat since the solder lacks durability at high temperatures. As a result, the whole fluorescent lamp system is increased disadvantageously in size.
In the lighting circuit 202 formed by mounting the individual components on the circuit board 206 and providing connections therebetween with wires, stringent positional restrictions are placed on the components with low heat resistance to circumvent a temperature increase. As a result, the whole lighting circuit 201 is inevitably increased disadvantageously in size in spite of various considerations given to the positional relations among the individual components.
By using the high heat resistance of a SiC substrate, a semiconductor device provided on the SiC substrate may be placed in equipment used in a high-temperature environment such as the lighting circuit. However, since the power transistor and power diode provided on the conventional SiC substrate are discrete devices, it is difficult to prevent the lighting circuit 202 from being increased in size.
It is therefore an object of the present invention to provide a semiconductor device to be placed suitably under stringent conditions including limited operating temperatures and limited space by providing at least either of active elements and passive elements on a compound semiconductor substrate with high heat resistance.
A first semiconductor device according to the present invention comprises: a compound semiconductor layer provided in a substrate; an active region provided on the compound semiconductor layer and composed of at least one first semiconductor layer functioning as a carrier flow region and at least one second semiconductor layer containing an impurity for carriers at a high concentration and smaller in film thickness than the first semiconductor layer such that the carriers are distributed therein under a quantum effect, the first and second semiconductor layers being alternately stacked; and a plurality of active elements provided on the active region.
In the arrangement, if a voltage which brings the active elements into the ON state is applied, the carriers in the second semiconductor layer spread out extensively to the first semiconductor layer so that the carriers are distributed in the entire active region. Because of a low impurity concentration in the first semiconductor layer, scattering of the carriers by impurity ions is reduced in the first semiconductor layer. If a MISFET and a diode are provided on the active region, therefore, carriers flow at a particularly high speed. Moreover, the whole active region is depleted in the OFF state irrespective of an average impurity concentration which is not low in the active region so that the carriers no more exist in the active region. Consequently, the breakdown voltage is defined by the first semiconductor layer at a low impurity concentration so that a high breakdown voltage is obtained in the entire active region.
Since the high-performance active elements integrated in the compound semiconductor layer are obtainable, the semiconductor device can be placed at a desired site without using solder even if the semiconductor device is used at high temperature. This improves the flexibility with which the semiconductor device is placed in equipment and allows the scaling down of the equipment using the semiconductor device.
Each of the plurality of active elements includes a MISFET having the first semiconductor layer located immediately under a gate insulating film. In the arrangement, the low impurity concentration in the first semiconductor layer reduces the number of charges trapped in the gate insulating film of a MISFET and in the vicinity of the interface between the gate insulating film and the active region and lessens the interrupting effect exerted by the trapped charges on the flowing carriers. What results is an integrated semiconductor device having a MISFET with a higher channel mobility.
The first semiconductor device comprises, as the active region, a first active region containing an impurity of a first conductivity type as the impurity for carriers in the second semiconductor layer and a second active region formed on the first active region and containing an impurity of a second conductivity type as the impurity for carriers in the second semiconductor layer, wherein the first active region is exposed at an uppermost layer of the substrate as a result of partly removing the second active region and a MISFET of the second conductivity type is provided at a portion at which the first active region is exposed, while a MISFET of the first conductivity type is provided on the second active region. The arrangement provides a semiconductor device functioning as a CMOS device comprising a pMOSFET and an nMOSFET.
The compound semiconductor layer is a semiconductor layer selected from the group consisting of a SiC layer, a GaN layer, an InP layer, an InGaAs layer, and an InGaPN layer. By using the characteristics of the compound semiconductor layers, a semiconductor device having particularly high heat resistance and a high breakdown voltage is obtained.
A second semiconductor device according to the present invention comprises: a semiconductor layer selected from the group consisting of a SiC layer, a GaN layer, an InP layer, an InGaAs layer, and an InGaPN layer; and an inductor provided on the semiconductor layer. By using the high heat resistance and high heat conductivity of the SiC layer, the GaN layer, the InP layer, the InGaAs layer, or the InGaPN layer, an inductor having an extremely fine pattern can be provided and an inductor having a small area and high inductance can be provided.
The semiconductor layer is composed of at least one first semiconductor layer functioning as a carrier flow region and at least one second semiconductor layer containing an impurity for carriers at a high concentration and smaller in film thickness than the first semiconductor layer such that the carriers are distributed therein under a quantum effect, the first and second semiconductor layers being alternately stacked, the device further comprising a plurality of active elements provided on the semiconductor layer. The arrangement provides a high-performance semiconductor device having the first semiconductor device provided on the semiconductor layer.
The second semiconductor device further comprises: a circuit including a MISFET provided on the semiconductor layer; a rectifying circuit including a Schottky diode provided on the semiconductor device; and a capacitor provided on the semiconductor layer, the device functioning as a lighting circuit for a fluorescent lamp device. The arrangement allows a semiconductor device miniaturized considerably and integrated in a common substrate to be placed in the high-temperature and limited space of a fluorescent lamp.